发明名称 |
Method and apparatus for integral state initialization and quality of lock monitoring in a clock and data recovery system |
摘要 |
Methods and apparatus are provided for improving the performance of second order CDR systems. The integral state of the CDR system is initialized to a value that is based on an expected frequency profile that may be known a priori for certain applications. One or more quality of lock (QOL) metrics are also monitored that are derived from the integral register state value. A quality of a locking between a received signal and a local clock generated by a Clock and Data Recovery (CDR) system is evaluated by monitoring a state value of an integral register in a digital loop filter of the CDR system; evaluating one or more predefined criteria based on the integral register state value; and identifying a poor lock condition if the one or more predefined criteria are not satisfied.
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申请公布号 |
US7792234(B2) |
申请公布日期 |
2010.09.07 |
申请号 |
US20060414521 |
申请日期 |
2006.04.28 |
申请人 |
AGERE SYSTEMS INC. |
发明人 |
AZIZ PERVEZ M.;SHEETS GREGORY W.;SINDALOVSKY VLADIMIR |
分类号 |
H04L7/00;H04L25/00;H04L25/40 |
主分类号 |
H04L7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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