| 摘要 |
A storage device capable of reducing a number of cycles necessary for a verify at a time of multi-value recording is provided. An initial value of a potential difference VCG between a gate and a source of a switching transistor at the time of the verify is set to a value varied in accordance with a resistance value level of multi-value information. In the case where a writing side performs a 3-value recording, when "01" is the information, an initial value VGS01 is set to be smaller than VGS = 1.7 V corresponding to the target resistance value level "01", and when "00" is the information, a value is set to be lower than VGS = 2.2 V corresponding to the target resistance value level "00" and higher than the above-described VGS01. This can reduce the number of cycles necessary for the verify process. |
