| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device having improved reliability of an element operation by increasing read margin and enhancing accuracy of reading operation. Ž<P>SOLUTION: The semiconductor memory device is provided with: a memory cell array including a plurality of word lines, a plurality of bit lines, and a plurality of inverted bit lines to which memory cells are connected; a row decoder for selecting any one of the plurality of word lines; a column decoder for generating a bit line selection signal in accordance with an address signal and simultaneously selecting two bit lines adjacent to each other or two inversion bit lines adjacent to each other; and a plurality of sense amplifiers for reading data stored in each memory cell selected by the row decoder and the column decoder, respectively. Two bit lines adjacent to each other or two inversion bit lines adjacent to each other are simultaneously selected, the selected two memory cells are simultaneously coupled in parallel to the first input end of the sense amplifier, reference voltage is applied to the second input end, and data are read. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
|
