发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To reduce the circuit area of a semiconductor integrated circuit with a plurality of SRAM macros, to which power voltage is supplied. <P>SOLUTION: A system LSI 100 having a logic circuit 104 and a plurality of SRAM macros 103 is provided with a power circuits 102 for generating a stabilizing voltage VDDM lower than a voltage VDDP, which is supplied from the outside of the system LSI 100. The voltage VDDM generated by the power circuit 102 and the voltage VDD supplied from the outside are supplied to the plurality of each of the SRAM macros 103. Also, the voltage VDD supplied from the outside is supplied to the logic circuit 104. <P>COPYRIGHT: (C)2010,JPO&INPIT</p>
申请公布号 JP2010192013(A) 申请公布日期 2010.09.02
申请号 JP20090032644 申请日期 2009.02.16
申请人 PANASONIC CORP 发明人 AGATA YASUHIRO;NARUMI NORIMASA;YAMAGAMI YOSHINOBU;MASUO AKIRA
分类号 G11C11/413;H01L21/8244;H01L27/11 主分类号 G11C11/413
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