| 摘要 |
PURPOSE: A shift register having a glitch free function in a power saving operation is provided to stabilize data shifting by minimizing a glitch at a clock for shifting data. CONSTITUTION: A driving operation controller makes a glitch free condition in a shift register having a down mode and an up mode to save power. The driving operation controller includes OR-gates(21,27), a flip-flop(23), and an inverter(25). The driving operation controller gates the output of flip-flops(2,4,6,8,10) to obtain a gating result signal. |
