发明名称 Memory with programmable address strides for accessing and precharging during the same access cycle
摘要 Embodiments of the present disclosure provide methods, apparatuses and systems including a storage configured to store and output multiple address strides of varying sizes to enable access and precharge circuitry to access and precharge a first and a second group of memory cells based at least in part on the multiple address strides during operation of the host apparatus/system, the first and second group of memory cells being different groups of memory cells.
申请公布号 US7787311(B2) 申请公布日期 2010.08.31
申请号 US20070937407 申请日期 2007.11.08
申请人 RAO G R MOHAN 发明人 RAO G. R. MOHAN
分类号 G11C8/18 主分类号 G11C8/18
代理机构 代理人
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