发明名称 Methods and apparatus for latency control in a multiprocessor system
摘要 Methods and apparatus provide for a multiprocessor system including: a plurality of sub-processors operatively coupled to one another over a ring bus, whereby data may be transmitted over one or more paths on the ring bus between pairs of the sub-processors; and a plurality of programmable delay circuits, each associated with at least one of the sub-processors, and each being operable to alter a delay of data transfer at least one of into and out of its associated sub-processor in order to alter one or more latencies associated with the paths on the ring bus between pairs of the sub-processors.
申请公布号 US7788467(B2) 申请公布日期 2010.08.31
申请号 US20070746408 申请日期 2007.05.09
申请人 SONY COMPUTER ENTERTAINMENT INC. 发明人 HATAKEYAMA AKIYUKI
分类号 G06F5/06 主分类号 G06F5/06
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