发明名称 Circuit arrangement and method for reducing electromagnetic interference
摘要 Circuit arrangement and method for reducing electromagnetic interference. The circuit arrangement includes a supply potential connection, a reference-ground potential connection, a controllable impedance element, a signal generator, and a circuit unit. The controllable impedance element is connected between the supply potential connection and the reference-ground potential connection, and has a control connection for receiving a control signal for controlling the impedance of the impedance element. The signal generator is coupled to the control connection of the impedance element. The circuit unit is connected between the supply potential connection and the reference-ground potential connection, and originates the electromagnetic interference during operation. The signal generator is designed to produce the control signal, which varies over time, in such a manner that the electromagnetic interference which originates from the circuit unit during operation is changed.
申请公布号 US7786621(B2) 申请公布日期 2010.08.31
申请号 US20060550933 申请日期 2006.10.19
申请人 QIMONDA AG 发明人 JOODAKI MOJTABA
分类号 H04B3/30 主分类号 H04B3/30
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