发明名称 |
Method and apparatus for invalidating cache lines during direct memory access (DMA) write operations |
摘要 |
A method and apparatus for invalidating cache lines during direct memory access (DMA) write operations are disclosed. Initially, a multi-cache line DMA request is issued by a peripheral device. The multi-cache line DMA request is snooped by a cache memory. A determination is then made as to whether or not the cache memory includes a copy of data stored in the system memory locations to which the multi-cache line DMA request are directed. In response to a determination that the cache memory includes a copy of data stored in the system memory locations to which the multi-cache line DMA request are directed, multiple cache lines within the cache memory are consecutively invalidated.
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申请公布号 |
US7788423(B2) |
申请公布日期 |
2010.08.31 |
申请号 |
US20080187094 |
申请日期 |
2008.08.06 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
DALY, JR. GEORGE W.;FIELDS, JR. JAMES S. |
分类号 |
G06F13/00 |
主分类号 |
G06F13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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