SEMICONDUCTOR MEMORY DEVICE FOR REDUCING POWER NOISE

摘要

PURPOSE: A semiconductor memory device is provided to reduce a power noise by varying a clock cycle of an inner clock signal in response to each command when a command with large current consumption is applied through a test. CONSTITUTION: An internal clock generator(250) generates an internal clock signal with a first clock cycle in response to a chip enable signal. The inner clock generator varies the clock cycle of the inner clock signal in response to the clock control signal. A control unit(220) applies an external command including a chip enable signal. The controller generates a clock control signal by corresponding to the external command. A power voltage sensor outputs the sensing signal by sensing the level variation of the power voltage.