DELAY LOCKED LOOP CIRCUIT AND METHOD OF OPERATING DELAY LOCKED LOOP CIRCUIT

摘要

PURPOSE: A delay locked loop circuit and a method of operating delay locked loop circuit are provided to efficiently manage the power by selectively using a digital delay synchronization loop core and an analogue delay synchronization loop core according to the operation speed. CONSTITUTION: A first delay synchronization loop core implements the operation by receiving an input clock signal of a first frequency. A second delay synchronization loop implements the operation by receiving an input clock signal of a second frequency which is smaller or equal to the first frequency. Either one of the first and second delay synchronization loop cores are selectively operated. The first delay synchronization loop core is composed of an analog delay synchronization loop core(111).