| 摘要 |
Apparatus and methods for full address resolution in a zoning SAS expander. A single memory circuit is used in a zoning SAS expander to store zone information associated with the SAS address (e.g., WWN) of devices exchanging information through the expander. The source and destination addresses in a received SAS frame are used as inputs to the memory circuit to generate outputs of the memory circuit representing the source and destination zone group identifiers. These outputs are then applied to the zone permission table to determine the zoning permission for forwarding the frame through the expander. Pipelined logic within the expander sequences the operations of the memory circuit and the zone permissions table to account for clock cycle delays in processing of each. In one exemplary embodiment, the memory circuit is a content addressable memory (CAM). In another exemplary embodiment, the CAM also includes port routing information.
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