发明名称 UNIFIED ARCHITECTURE FOR FOLDING ADC
摘要 A system, apparatus and method for a folding analog-to-digital converter (ADC) are described. The general architecture of the folding ADC includes an array (1 - N) of cascaded folding amplifier stages, a distributed array of fine comparators, and an encoder. Each folding amplifier stage includes folding amplifiers that are configured to receive inputs from a prior stage, and also generate output signals for the next stage. The folding amplifiers output signals for a given stage are evaluated by a corresponding comparator stage, which may include multiple comparators, and also optionally coupled to an interpolator. The outputs of the comparators from all stages are collectively evaluated by the encoder, which generates the output of the folding ADC. Unlike conventional folding ADCs that require fine and coarse channels, the presently described folding ADC provides conversion without the need for a coarse channel. The encoder can also be arranged to facilitate recursive error correction.
申请公布号 WO2010033232(A4) 申请公布日期 2010.08.26
申请号 WO2009US05225 申请日期 2009.09.18
申请人 NATIONAL SEMICONDUCTOR CORPORATION;TAFT, ROBERT, CALLAGHAN 发明人 TAFT, ROBERT, CALLAGHAN
分类号 H03M1/12 主分类号 H03M1/12
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