发明名称 |
COMBINED PROCESSING AND NON-VOLATILE MEMORY UNIT ARRAY |
摘要 |
A reconfigurable logic device comprises an array of tiles interconnected through a routing network, each tile comprises both a processing unit including volatile configuration memory and a Random Access Memory unit.
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申请公布号 |
US2010213975(A1) |
申请公布日期 |
2010.08.26 |
申请号 |
US20100713672 |
申请日期 |
2010.02.26 |
申请人 |
PRICE NEIL;STANSFIELD ANTHONY |
发明人 |
PRICE NEIL;STANSFIELD ANTHONY |
分类号 |
H03K19/173 |
主分类号 |
H03K19/173 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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