USE OF IN-SITU HCL ETCH TO ELIMINATE BY OXIDATION RECRYSTALLIZATION BORDER DEFECTS GENERATED DURING SOLID PHASE EPITAXY (SPE) IN THE FABRICATION OF NANO-SCALE CMOS TRANSISTORS USING DIRECT SILICON BOND SUBSTRATE (DSB) AND HYBRID ORIENTATION TECHNOLOGY (HOT)

摘要

A method for reducing defects at an interface between a amorphized, recrystallized cleaved wafer layer and an unamorphized cleaved wafer layer can comprise an anneal and an exposure to hydrochloric acid. The anneal and acid exposure can be performed within an epitaxial reactor chamber to minimize wafer transport.