发明名称 |
Einrichtung zum Steuern der Rücksetzung in einem Videosignalcodierer |
摘要 |
<p>A video signal encoding system includes a signal processor for segmenting encoded video data into transport blocks having a header section and a packed data section. The system also includes reset control apparatus for releasing resets of system components, after a global system reset, in a prescribed non-simultaneous phased sequence to enable signal processing to commence in the prescribed sequence. The phased reset release sequence begins when valid data is sensed as transiting the data lines.</p> |
申请公布号 |
DE4322356(B4) |
申请公布日期 |
2010.08.26 |
申请号 |
DE19934322356 |
申请日期 |
1993.07.05 |
申请人 |
GENERAL ELECTRIC CO. |
发明人 |
ACAMPORA, ALFONSE ANTHONY;BUNTING, RICHARD MICHAEL |
分类号 |
H04N5/92;H04N7/24;H04J3/00;H04L12/56;H04N7/015;H04N7/54;H04N7/56;H04N7/60;H04N7/62;H04N19/00;H04N19/89;H04N21/236;H04Q11/04 |
主分类号 |
H04N5/92 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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