Memory device and operation method of the same

摘要

Disclosed herein is a memory device including: first and second wires; memory cells including a variable-resistance storage element having a data storage state making a transition by a change of a voltage applied and an access transistor connected in series between the first and second wires; driving control sections controlling a direct verify sub-operation by applying a write/erase pulse between the first and second wires in a data write/erase operation respectively for causing a cell current to flow between the first and second wires through the memory cell for a transition of the data storage state; sense amplifiers sensing an electric-potential change occurring on the first wire in accordance with control on the direct verify sub-operation; and inhibit control sections determining whether or not to inhibit a sense node of the sense amplifier from electrically changing at the next sensing time on the basis of an electric potential appearing at the sense node at the present sensing time.