摘要 |
<p>The detector (34) comprises a plurality of detection stages {36, 38, 40, 42, 44, 46, 48) connected to a summator (50) for providing a summation signal (52) as a logarithmic representation of the input signal to a first input (54) of a data slicer (56) and an input (60) of an average filter (58) having an output (62) connected to a second input (64) of the data slicer. The data slicer has a data slicer output (66) for providing an extracted digital data signal in dependence on a comparison of the summation signal and an output signal of the average filter. The average filter receives a first pre-charge voltage depending on an output signal of a carrier detector circuit (68) detecting a carrier signal of the input signal, and a second pre-charge voltage depending on the carrier detector output signal indicating a forst rising edge of the input signal.</p> |