<p>The present disclosure includes methods, devices, and systems for data integrity in memory controllers. One memory controller embodiment includes a host interface and first error detection circuitry coupled to the host interface. The memory controller can include a memory interface and second error detection circuitry coupled to the memory interface. The first error detection circuitry can be configured to calculate error detection data for data received from the host interface and to check the integrity of data transmitted to the host interface. The second error detection circuitry can be configured to calculate error correction data for data and first error correction data transmitted to the memory interface and to check integrity of data and first error correction data received from the memory interface.</p>
申请公布号
WO2010096153(A2)
申请公布日期
2010.08.26
申请号
WO2010US00412
申请日期
2010.02.12
申请人
MICRON TECHNOLOGY, INC.;ASNAASHARI, MEHDI;YAMADA, RONALD;NEMAZIE, SIAMACK;YANG, RAY
发明人
ASNAASHARI, MEHDI;YAMADA, RONALD;NEMAZIE, SIAMACK;YANG, RAY