发明名称 HIGH VOLTAGE DEVICE AND FABRICATION METHOD THEREOF
摘要 <p>PURPOSE: A high voltage device and its manufacture method are provided to decrease capacitance between a drain region and a gate electrode by forming a first gate insulating layer thicker than a second gate insulating layer formed in the side. CONSTITUTION: A drain region is formed in the back side of a substrate. A first gate insulating layer(112C) is formed to be buried from the bottom of a trench(108) to a constant depth. A second gate insulating layer(118) is formed in the side of the trench to the thickness thinner than the first gate insulating layer. A gate electrode(120) is formed on the first and the second gate insulating layer. A source region is formed within the substrate located between trenches.</p>
申请公布号 KR20100093765(A) 申请公布日期 2010.08.26
申请号 KR20090012846 申请日期 2009.02.17
申请人 MAGNACHIP SEMICONDUCTOR, LTD. 发明人 RYU, DOO YEOL;LEE, JONG KON
分类号 H01L29/78 主分类号 H01L29/78
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