发明名称 Method of matching an input bit length to an output bit length
摘要 <p>A method of matching an input bit length of input data (26), having an input data order, to an output bit length (28), comprises dividing the input data (26) into a plurality of data blocks (26a, 26b, 26c, 26d) having respective data block bit lengths; providing a processing variable having an initial state (e ini ); pre-calculating a block initial state (e ini,i ) of the processing variable (e) for each of the plurality of data blocks (26a, 26b, 26c, 26d); and separately processing each of the plurality of data blocks (26a, 26b, 26c, 26d). The separate processing of each of the plurality of data blocks respectively comprises setting a current state (e) of the processing variable to the respective block initial state (e ini,i ) of the processing variable, and iteratively selecting a bit set, comprising a predetermined number of input bits, in accordance with the input data order, processing the respective bit set based on the current state (e) of the processing variable and updating the current state (e) of the processing variable based on the processing of the respective bit set. The method of matching the input bit length to the output bit length further comprises combining the processed data blocks (28a, 28b, 28c, 28d) into output data (28) having the output bit length.</p>
申请公布号 EP2222006(A1) 申请公布日期 2010.08.25
申请号 EP20090002455 申请日期 2009.02.20
申请人 ST-ERICSSON SA 发明人 HEINLE, FRANK
分类号 H04L1/00;H04L1/18;H04L25/06 主分类号 H04L1/00
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