发明名称 Test apparatus and test module
摘要 Provided is a test apparatus that tests a device under test, comprising a control apparatus that controls the test apparatus; a pattern generator that generates a plurality of test patterns to be provided to a plurality of input terminals of the device under test; a plurality of variable delay circuits that designate a timing for supplying each of the plurality of test patterns to a corresponding input terminal of the plurality of input terminals; and a plurality of micro-controllers that operate in parallel, according to instructions from the control apparatus, to each measure a delay amount of a variable delay circuit when the variable delay circuit is set with a prescribed delay setting value and store the delay setting value in association with the measured delay amount.
申请公布号 US7782064(B2) 申请公布日期 2010.08.24
申请号 US20080276416 申请日期 2008.11.24
申请人 ADVANTEST CORPORATION 发明人 MATSUMOTO JUNICHI;YAMADA MASUHIRO
分类号 H01H31/02 主分类号 H01H31/02
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