发明名称 |
Circuit configuration and manufacturing processes for vertical transient voltage suppressor (TVS) and EMI filter |
摘要 |
A vertical TVS (VTVS) circuit includes a semiconductor substrate for supporting the VTVS device thereon having a heavily doped layer extending to the bottom of substrate. Deep trenches are provided for isolation between multi-channel VTVS. Trench gates are also provided for increasing the capacitance of VTVS with integrated EMI filter.
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申请公布号 |
US7781826(B2) |
申请公布日期 |
2010.08.24 |
申请号 |
US20060600696 |
申请日期 |
2006.11.16 |
申请人 |
ALPHA & OMEGA SEMICONDUCTOR, LTD. |
发明人 |
MALLIKARARJUNASWAMY SHEKAR;BOBDE MADHUR |
分类号 |
H01L0276/000006 |
主分类号 |
H01L0276/000006 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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