发明名称 High latency interface between hardware components
摘要 A hard disk controller comprises a first circuit that transmits a first signal to control data transfer between the hard disk controller and a read/write channel. A second circuit transmits or receives data under control of the first signal. A third circuit transmits a second signal to control data transfer between a storage media and the read/write channel. A mode circuit transmits mode data under control of the second signal. A read channel circuit comprises a data circuit and a first circuit that receives a first signal that controls the transfer of data to and from the data circuit. A second circuit transmits or receives data under control of the first signal. A mode circuit receives mode data under control of a second signal. Data is transferred to and from the input/output circuit in accordance with the second signal.
申请公布号 US7783815(B1) 申请公布日期 2010.08.24
申请号 US20080214186 申请日期 2008.06.16
申请人 MARVELL INTERNATIONAL LTD. 发明人 AZIMI SAEED
分类号 G06F13/14 主分类号 G06F13/14
代理机构 代理人
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