发明名称 METHOD FOR FORMING VIA
摘要 The invention provides a method for forming a via. A first dielectric layer is formed on a substrate. A conductive structure is formed in the first dielectric layer. A second dielectric layer is formed on the first dielectric layer and conductive structure. A first etching step is performed by using a first etching mixture to form a first via in the second dielectric layer. A second etching step is performed by using a second etching mixture to form a second via under the first via. The second via exposes at least a top surface of the conductive structure. An etching rate of the second etching step is slower than the first etching step.
申请公布号 US2010210113(A1) 申请公布日期 2010.08.19
申请号 US20090371105 申请日期 2009.02.13
申请人 VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION 发明人 LO WEN-SHUN;LIU HSING-CHAO
分类号 H01L21/3065 主分类号 H01L21/3065
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