| 摘要 |
A method of testing a wafer capable of minimizing the asymmetrical thermal deformation of a probe card when a wafer is tested using a probe card and of minimizing the number of times of tests to effectively test a large area wafer and a probe card for the same is presented. For the wafer test method for testing semiconductor chips on a wafer using a probe card, the method includes creating virtual repeating units corresponding to N semiconductor chips, wherein the N is natural number larger than or equal to 2, arranging the plurality of repeating units on the wafer and moving the probe card or the wafer N times and testing the semiconductor chips on a wafer, wherein the semiconductor chips in the repeating units are sequentially tested one by one per each touchdown. Also, the probe cards to realize above mentioned method have been described.
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