| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a signal processing apparatus or the like that has a relatively simply structure and detects data from a phase modulation signal using a clock having the same frequency as a carrier. <P>SOLUTION: In the signal processing apparatus, a plurality of extraction clocks are generated by delaying, by a given amount, the phase of a drive clock having the same frequency as the carrier; a plurality of output data sampled from modulation signals obtained by shifting the phase of the carrier, by using respective extraction clocks, the output data being in synchronization with a given drive clock, are generated; a plurality of output data in synchronization with a given drive clock are generated; the generated output data are shifted in accordance with the given extraction clock; a sampling bit row is generated that is longer than one cycle of the carrier; error data is generated that represents an amount of deviation between the phase of the bit string and the phase of the carrier using one cycle worth of bit row of the carrier cut out from the generated sampling row; and a position is decided where one cycle of bit string having the phase nearly identical to that of the carrier is cut out based on the generated error data. <P>COPYRIGHT: (C)2010,JPO&INPIT |
