发明名称 |
VERTICAL AND TRENCH TYPE INSULATED GATE MOS SEMICONDUCTOR DEVICE |
摘要 |
A vertical and trench type insulated gate MOS semiconductor device is provided in which the surfaces of p-type channel regions and the surfaces of portions of an n-type semiconductor substrate alternate in the longitudinal direction of the trench between the trenches arranged in parallel, and an n+-type emitter region selectively formed on the surface of the p-type channel region is wide by the side of the trench and becomes narrow toward the center point between the trenches. This enables the device to achieve low on-resistance and enhanced turn-off capability.
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申请公布号 |
US2010207162(A1) |
申请公布日期 |
2010.08.19 |
申请号 |
US20100767356 |
申请日期 |
2010.04.26 |
申请人 |
FUJI ELECTRIC SYSTEMS CO., LTD. |
发明人 |
YOSHIKAWA KOH;WAKIMOTO HIROKI;OTSUKI MASAHITO |
分类号 |
H01L29/739 |
主分类号 |
H01L29/739 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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