| 摘要 |
A latch circuit is connected to a first common node, a first, second output node, and a first, second connection node. A first resistance change element is connected to the first connection node, and a second common node. A second resistance change element is connected to the second connection node, and the second common node. When a first data is stored, voltages of the first common node, second common node, and first output node are set at a first reference voltage, and a voltage of the second output node is set at a second reference voltage. When a second data is stored, voltages of the first common node, second common node, and second output node are set at the first reference voltage, and a voltage of the first output node is set at the second reference voltage. |
