发明名称 INCORPORATING GATE CONTROL OVER A RESONANT TUNNELING STRUCTURE IN CMOS TO REDUCE OFF-STATE CURRENT LEAKAGE, SUPPLY VOLTAGE AND POWER CONSUMPTION
摘要 A semiconductor device and method for fabricating a semiconductor device incorporating gate control over a resonant tunneling structure. The semiconductor device includes a source terminal, a gate terminal, a drain terminal, and a resonant tunneling structure located beneath or adjacent to the gate terminal, where the gate terminal controls an electrostatic potential drop through the resonant tunneling structure as well as controlling a potential within a portion of the conduction channel immediately beneath the gate terminal as in a MOSFET. The semiconductor device is fabricated by growing epitaxial layers of tunnel barriers and quantum wells, where a quantum well is formed between each set of two tunneling barriers. Additionally, the epitaxial layers of tunnel barriers and quantum wells are grown, etched and patterned to form a resonant tunneling structure. Further, the semiconductor device is grown, etched and patterned to form a gate, source and drain electrode.
申请公布号 US2010207101(A1) 申请公布日期 2010.08.19
申请号 US20090370844 申请日期 2009.02.13
申请人 BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM 发明人 REGISTER, II LEONARD FRANKLIN;BANERJEE SANJAY
分类号 H01L29/66;H01L21/335 主分类号 H01L29/66
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