WIRING STRUCTURE FOR A SEMICONDUCTOR-INTEGRATED CIRCUIT, AND SEMICONDUCTOR DEVICE HAVING THE WIRING STRUCTURE

摘要

Provided is a semiconductor-integrated circuit chip (700) having a wiring layer, which is limited in the length of the wiring or in the area occupied by the wiring.  The semiconductor-integrated circuit chip is constructed such that the position of a vacant area (702) existing between power source wiring segments (701) is shifted within a range satisfying the length limit and the area limit of the power source wiring and relative to power source wiring of the same potential existing in parallel with a dominant wiring direction.  The local resistance increase is dispersed to suppress the influences of a voltage drop.