发明名称 Systems and Methods for Reduced Latency Loop Recovery
摘要 Various embodiments of the present invention provide systems and methods for reduced latency feedback in a data processing system. For example, some embodiments provide a data processing system that includes a variable gain amplifier, a processing circuit, a data detector, and an error signal calculation circuit. The variable gain amplifier amplifies a data input signal and provides an amplified signal. The processing circuit generates a signal output corresponding to the amplified signal, and includes a conditional multiplication circuit. The conditional multiplication circuit conditionally multiplies the signal output by a gain correction signal and provides the result as an interim output. The data detector applies a data detection algorithm to the signal output and provides an ideal output. The error signal calculation circuit generates a gain correction signal based at least in part on the interim output and a derivative of the ideal output. The level of amplification by the variable gain amplifier is based at least in part on the gain correction signal.
申请公布号 US2010208574(A1) 申请公布日期 2010.08.19
申请号 US20090371906 申请日期 2009.02.16
申请人 AGERE SYSTEMS INC. 发明人 RATNAKAR ARAVIND NAYAK;RAUSCHMAYER RICHARD
分类号 G11B3/00;H03G3/10 主分类号 G11B3/00
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