发明名称 |
Flexible structures for interconnect reliability test |
摘要 |
A method for forming an integrated circuit structure includes forming a test wafer. The step of forming the test wafer includes providing a first semiconductor substrate; and forming a first plurality of unit blocks over the first semiconductor substrate. Each of the first plurality of unit blocks includes a plurality of connection block cells arranged as an array. Each of the connection block cells includes two connection blocks, and a metal line connecting the two connection blocks. The method further includes forming a plurality of unit block boundary lines separating the first plurality of unit blocks from each other; and forming a first plurality of metal lines connecting a portion of the first plurality of unit blocks.
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申请公布号 |
US7776627(B2) |
申请公布日期 |
2010.08.17 |
申请号 |
US20080971072 |
申请日期 |
2008.01.08 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
JENG SHIN-PUU;HOU SHANG-YUN;TSAI HAO-YI;WU ANBIARSHY N. F. |
分类号 |
H01L21/66 |
主分类号 |
H01L21/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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