发明名称 Symbolic store-load bypass
摘要 The invention provides a method and system for operating a pipelined microprocessor more quickly, by detecting instructions that load from identical memory locations as were recently stored to, without having to actually compute the referenced external memory addresses. The microprocessor examines the symbolic structure of instructions as they are encountered, so as to be able to detect identical memory locations by examination of their symbolic structure. For example, in a preferred embodiment, instructions that store to and load from an identical offset from an identical register are determined to be referencing the identical memory location, without having to actually compute the complete physical target address.
申请公布号 US7779236(B1) 申请公布日期 2010.08.17
申请号 US19990443160 申请日期 1999.11.19
申请人 STMICROELECTRONICS, INC. 发明人 ISAMAN DAVID L.
分类号 G06F9/40 主分类号 G06F9/40
代理机构 代理人
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