发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device capable of reducing the variation of the output voltage of an output buffer circuit by PTV variation. SOLUTION: A replica circuit 32 and a differential amplifier 41 are provided corresponding to an NMOS transistor 23. The replica circuit 32 is the replica of a circuit comprising a thevenin terminating circuit 5, an external signal wire 4 and NMOS transistors 21 and 23, and generates a reference voltage VREF1. The differential amplifier 41 configures a negative feedback circuit for controlling the voltage of a node N 26 together with the NMOS transistor 21. When the threshold of the NMOS transistor 23 becomes high due to the PTV variation, the threshold of an NMOS transistor 37 becomes high as well, the capacity of the NMOS transistor 37 declines as well, the reference voltage VREF1 declines, the voltage of the node 26 declines, and an L side output voltage VOL declines. Thus, the dispersion of the L side output voltage VOL is reduced. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010178094(A) 申请公布日期 2010.08.12
申请号 JP20090018897 申请日期 2009.01.30
申请人 FUJITSU SEMICONDUCTOR LTD 发明人 IWANAGA NAOKI;MORII MASAHARU
分类号 H03K19/0175;H03F3/26;H03K19/0948 主分类号 H03K19/0175
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