发明名称 A/D CONVERTER, AND DITHERING METHOD
摘要 <P>PROBLEM TO BE SOLVED: To provide an A/D converter advantageous for achieving small scaling of a circuit and power saving without changing dither points. Ž<P>SOLUTION: The A/D converter has dither generators 102 and 103 which generate a plurality of dithers, an adder circuit 106 which adds the plurality of dithers generated by the dither generators 102 and 103 to analog input signals, the A/D converter 107 which converts the analog input signals that are added with the plurality of dithers to digital signals, dither extraction sections 104 and 105 which extract dithers from the digital signals, and a subtraction circuit 108 which subtracts the extracted dithers from the digital signals. The dither generators 102 and 103 have a D1 generator 111, a D2 generater 112 and a D3 generator 115 each of which generates dithers with different values, and multipliers 114 and 116 which randomly configure the polarity of generated dithers to negative or positive. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010177914(A) 申请公布日期 2010.08.12
申请号 JP20090017017 申请日期 2009.01.28
申请人 ASAHI KASEI ELECTRONICS CO LTD 发明人 SOFUE KAZUKI
分类号 H03M1/08 主分类号 H03M1/08
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