发明名称 EVALUATION PATTERN-GENERATING METHOD OF SEMICONDUCTOR MEMORY, AND SIGNAL OBTAINING TOOL
摘要 <P>PROBLEM TO BE SOLVED: To provide an evaluation pattern-generating method of a semiconductor memory, in which the defect can be effectively detected, and to provide a signal-obtaining tool suitable for the same. Ž<P>SOLUTION: In a first step, a memory input signal when defective memory operation is caused in an actual device test of a semiconductor memory in a state mounted on a system is extracted. In a second step, the extracted memory input signal is preserved. In a third step, the preserved memory input signal is converted to a signal pattern which can be taken in the semiconductor memory. In a fourth step, a test of a semiconductor memory determined as defective memory operation using the test pattern converted to the signal pattern by a semiconductor memory tester, is performed and reappearance of the occurrence of the defective operation is verified. In a fifth step, the test pattern of the semiconductor memory in which reappearance of the occurrence of defective operation is confirmed is incorporated in the evaluation pattern of the semiconductor memory of the semiconductor memory tester. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010176753(A) 申请公布日期 2010.08.12
申请号 JP20090018895 申请日期 2009.01.30
申请人 HITACHI ULSI SYSTEMS CO LTD 发明人 KAWAGUCHI NOBUHIRO
分类号 G11C29/10;G01R31/28 主分类号 G11C29/10
代理机构 代理人
主权项
地址