| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To substantially reduce power consumption of the entire device by eliminating useless power consumption in a fault memory with a damage or the like. <P>SOLUTION: The power saving storage device includes: a plurality of RAMs (memories) 2-0-2-00 to 2-0-2-10; a data distribution circuit 2-0-1 for distributing/editing write data/read data; and a RAM control signal generation circuit 2-0-0 for generating RAM control signals (memory control signals) in response to a request from a host device and sending them out to the respective RAMs 2-0-2-00 to 2-0-2-10. The RAM control signal generation circuit 2-0-0 includes power saving control circuits 11-0 to 11-10 for individually controlling the power saving of the RAM which has failed. <P>COPYRIGHT: (C)2010,JPO&INPIT</p> |
