发明名称 SEMICONDUCTOR PACKAGE AND PACKAGING METHOD THEREOF
摘要 <P>PROBLEM TO BE SOLVED: To provide a small-sized semiconductor package with an input/output terminal which is capable of reducing impedance mismatching which occurs when packaging the semiconductor package in a mounting substrate, and to provide a packaging method thereof. <P>SOLUTION: With respect to an input/output terminal 100 provided in the semiconductor package, signal line leads 8 and ground line leads 9 have wide portions 8A and 9A wherein lead widths are wider than those in both end of the signal line leads 8 and the ground line leads 9, outside signal lines 6 and ground lines 7 of the input/output terminal 100. The wide portions 8A and 9A are designed so that characteristic impedance may be about 50 &Omega;. This configuration of the signal line leads 8 and ground line leads 9 allows reduction in impedance mismatching which occurs when packaging the semiconductor package in a mounting substrate. Additionally, the semiconductor package can be miniaturized in the case of necessity of a plurality of input/output terminals because a lead structure is employed. <P>COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010177364(A) 申请公布日期 2010.08.12
申请号 JP20090017026 申请日期 2009.01.28
申请人 NIPPON TELEGR & TELEPH CORP;NTT ELECTORNICS CORP 发明人 ONODERA KIYOMITSU;ITO TOSHIHIRO;TSUNASHIMA SATOSHI;FURUTA TOMOSHI;ISHIBASHI TADAO
分类号 H01L23/12 主分类号 H01L23/12
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