发明名称 Clock data recovery systems and methods for direct digital synthesizers
摘要 A system and method for clock data recovery for programming direct digital synthesizers is disclosed. A counter is used to calculate a coarse measurement of the clock frequency of a received digital signal, and a tap delay line is used to calculate a fine measurement of the clock frequency of the received digital signal. The coarse and fine measurements are used to calculate a value for programming a direct digital synthesizer to produce a clock signal that is an approximate replica of the clock frequency of the received digital signal.
申请公布号 US7773713(B2) 申请公布日期 2010.08.10
申请号 US20060584410 申请日期 2006.10.19
申请人 MOTOROLA, INC. 发明人 CAFARO NICHOLAS G.;STENGEL ROBERT E.
分类号 H03D3/24 主分类号 H03D3/24
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