| 摘要 |
A flexible and relatively hardware efficient LDPC encoder is described. The encoder can be implemented with a level of parallelism which is less than the full parallelism of the code structure used lo control the encoding process. Each command of a relatively simple microcode used to describe the code structure can be stored and executed multiple limes lo complete the encoding of a codeword. Different codeword lengths can he supported using the same set of microcode instructions bin with the code being implemented a different number of times depending on the lifting factor selected to be used. The LDPC encoder can switch between encoding codewords of different lengths, without tile need to change the stored code description information, by simply changing a code lifting factor used to control the encoding processes. When coding codewords shorter than the maximum supported codeword length some block storage locations and/or registers may go unused. |
