| 摘要 |
FIELD: information technologies. ^ SUBSTANCE: method for arrangement of globally addressed common memory in multiprocessor computer on the basis of multicore-multi-tread microprocessor with application of two-level segment virtual memory, with application of segments of two types - ordinary segments and supersegments of large volume, with support of scrambling, with simultaneous use of support of two-level segment virtual memory uses three-level segment-page arrangement of memory with partial execution of address translation stage at remote unit, moreover, one TLB is used to support operation with supersegments, for each segment or supersegment a number of units is controlled, which are used to distribute segment by one of two methods - block or block-cyclic, for each segment or supersegment a logical numbering of units or virtual numbering of units is used. ^ EFFECT: control of data localisation and improved efficiency of use and control over systematic software and local memory of each unit and supercomputer as a whole. ^ 3 dwg |
