发明名称 |
Accurate capacitance measurement for ultra large scale integrated circuits |
摘要 |
Test structures and methods for measuring contact and via parasitic capacitance in an integrated circuit are provided. The accuracy of contact and via capacitance measurements are improved by eliminating not-to-be-measured capacitance from the measurement results. The capacitance is measured on a target test structure that has to-be-measured contact or via capacitance. Measurements are then repeated on a substantially similar reference test structure that is free of to-be-measured contact or via capacitances. By using the capacitance measurements of the two test structures, the to-be-measured contact and via capacitance can be calculated.
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申请公布号 |
US7772868(B2) |
申请公布日期 |
2010.08.10 |
申请号 |
US20070966653 |
申请日期 |
2007.12.28 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
DOONG YIH-YUH;CHANG KEH-JENG;MII YUH-JIER;LIU SALLY;HUNG LIEN JUNG;CHANG VICTOR CHIH YUAN |
分类号 |
G01R31/26 |
主分类号 |
G01R31/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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