发明名称 Semiconductor device with large blocking voltage and method of manufacturing the same
摘要 A normally-off type junction FET in which a channel resistance is reduced without lowering its blocking voltage is provided. In a junction FET formed with using a substrate made of silicon carbide, an impurity concentration of a channel region (second epitaxial layer) is made higher than an impurity concentration of a first epitaxial layer to be a drift layer. The channel region is formed of a first region in which a channel width is constant and a second region below the first region in which the channel width becomes wider toward the drain (substrate) side. A boundary between the first epitaxial layer and the second epitaxial layer is positioned in the second region in which the channel width becomes wider toward the drain (substrate) side.
申请公布号 US7772613(B2) 申请公布日期 2010.08.10
申请号 US20090533740 申请日期 2009.07.31
申请人 RENESAS TECHNOLOGY CORP. 发明人 SHIMIZU HARUKA;YOKOYAMA NATSUKI
分类号 H01L29/80 主分类号 H01L29/80
代理机构 代理人
主权项
地址