| 摘要 |
This invention realizes a synchronization control function without providing a bus dedicated for synchronization control by using a bus (system bus) used to transmit and receive data between units from the prior art. When a timer interruption occurs during the execution of a process performed in a normal cyclic, a CPU unit interrupts the process and transmits synchronization data by collective addressing using the system bus to other synchronization units performing the synchronization control. The synchronization unit executes a synchronization cycle upon the reception of the synchronization data by collective addressing as a trigger, acquires the received synchronization data with the start of the synchronization cycle, and performs a refresh process of the synchronization data of IN data after executing an input/output process. The CPU unit performs the refresh process of the synchronization data of the IN data, and obtains the synchronization data to be transmitted next by a synchronization interrupt task process. The synchronization unit constantly acquires the most recent synchronization data and simultaneously operates. |
