| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To reduce a consumption current during operation in a delay circuit for output of an input signal with a delay. <P>SOLUTION: A capacitance element 107 is connected to a terminal 202 of the delay circuit 100 via a P-channel MOS transistor 105. In a NAND circuit 104, an input terminal is connected to an input terminal 201 of the delay circuit 100 and an inverter 103, and an output terminal is connected to a gate terminal of the P-channel MOS transistor 105. In the inverter 103, an input terminal is connected to the output terminal of the delay circuit 100. In the P-channel MOS transistor 105, a terminal 202 and the capacitance element 107 are made to be electrically connectionless in response to the fact that an output signal of the delay circuit 100 changes to a H level from an L level. <P>COPYRIGHT: (C)2010,JPO&INPIT</p> |
