发明名称 |
Semiconductor memory device having shift registers |
摘要 |
A semiconductor memory device includes n stages of memory cell units, sense amplifier units, and shift registers. N units of the shift registers are connected to one another on the left end sides. The signal processing units and the reversed signal processing units are disposed adjacent to one another in each of the n units of the shift registers. The signal processing units located on the odd-numbered positions counted from the input end side are connected to one another. The reversed signal processing units located on the even-numbered positions counted from the input end side are connected to one another. The signal processing units located on the end opposite to the input end side are connected to the reversed signal processing units located on the end opposite to the input end side. Each of the signal processing units includes the logic circuit unit and the flip-flop while each of the reversed signal processing units includes the reversed logic circuit unit and the reversed flip-flop.
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申请公布号 |
US2010195410(A1) |
申请公布日期 |
2010.08.05 |
申请号 |
US20100692111 |
申请日期 |
2010.01.22 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
KAKU DAICHI;NAMEKAWA TOSHIMASA |
分类号 |
G11C7/10;G11C7/00;G11C8/18 |
主分类号 |
G11C7/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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