发明名称 |
MICROPROCESSOR BOOT-UP CONTROLLER, NONVOLATILE MEMORY CONTROLLER, AND INFORMATION PROCESSING SYSTEM |
摘要 |
An information processing apparatus has a multi-valued NAND nonvolatile memory including a plurality of word lines and a plurality of memory cells connected to the respective word lines. Each memory cell has a plurality of threshold voltages, and is divided into a first and a second storage area. A program code is stored in the first storage area, and user data is stored in the second storage area. The apparatus also includes a volatile memory to which the program code is transferred from the multi-valued NAND nonvolatile memory. The apparatus further includes a CPU connected to the volatile memory and configured to operate based on the program code transferred to the volatile memory.
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申请公布号 |
US2010199082(A1) |
申请公布日期 |
2010.08.05 |
申请号 |
US20100756836 |
申请日期 |
2010.04.08 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
SUKEGAWA HIROSHI;SAKAUE KENJI;TSUNODA HITOSHI |
分类号 |
G06F9/00;G06F11/10;G06F9/445;G06F12/00;G06F12/02 |
主分类号 |
G06F9/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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