| 摘要 |
PROBLEM TO BE SOLVED: To maintain the original logical hierarchical structure of a chip in hierarchical design in which optional layout areas on the chip are extracted and redesigned. SOLUTION: An apparatus for designing a semiconductor integrated circuit includes an input means for inputting chip layout information representing gate level placement or routing of a chip, a blocking means for extracting and blocking optional layout areas on the chip represented by the chip layout information, a mapping means for mapping a logical hierarchical structure of the chip dividingly according to the extracted blocks to generate partial logical hierarchical structures corresponding to the blocks, a redesign means for redesigning each extracted block while maintaining the logical hierarchical structure, a layout change means for substituting the result of redesign of each block for the corresponding layout area on the original chip to change the layout of the chip, and an integration means for integrating the logical hierarchical structure of each block to restore the original logical hierarchical structure. COPYRIGHT: (C)2010,JPO&INPIT
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