发明名称 Isolation circuitry for hiding a power consumption characteristic of an associated processing circuit
摘要 <p>Isolation circuitry 25 is provided for coupling between a power supply 40 and processing circuitry 15 in order to provide power to the processing circuitry whilst hiding a power consumption characteristic of that processing circuitry. The isolation circuitry comprises a plurality of sub-circuits, each comprising a capacitor, a first switch providing a connection between the capacitor and the power supply, a second switch providing a connection between the capacitor and the processing circuitry, and a third switch providing a connection across the capacitor to partially discharge the capacitor. Control circuitry controls the sub-circuits, such that within each sub-circuit the first, second and third switches are placed in an active state in a repeating sequence. Each of the sub-circuits further comprises a comparator to place the thud switch in an open state when a predetermined non-zero voltage difference across the capacitor is reached during the active state of the third switch. This ensures that the voltage across the comparator at the end of the discharge operation is always the same irrespective of the voltage present at the start of the discharge operation and the power consumption characteristic of the processing circuitry is entirely hidden by the isolation circuitry.</p>
申请公布号 GB2467406(A) 申请公布日期 2010.08.04
申请号 GB20090022235 申请日期 2009.12.18
申请人 THE REGENTS OF THE UNIVERSITY OF MICHIGAN 发明人 CARLOS ALFONSO TOKUNAGA;DAVID THEODORE BLAAUW
分类号 H02M3/07;G06F1/26;G06F21/00 主分类号 H02M3/07
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